How a CPU’s architecture determines the size of its memory space, how memory addresses work at the byte level, and how these addresses are represented in binary and hexadecimal formats, showing the maximum memory each architecture can handle.

A 32-bit CPU architecture means that the process memory space is represented using 32 bits. The lowest memory address in this space can be visualized in binary as 0000 0000 0000 0000 0000 0000 0000 0000. Following the same logic, the highest memory address in binary is 1111 1111 1111 1111 1111 1111 1111 1111.

Memory Space

By convention, memory addresses are often written in hexadecimal format. In this notation, the lowest address is 0x00000000 and the highest address is 0xFFFFFFFF, since each group of four binary digits corresponds to a single hexadecimal digit, with 0000 equaling 0x0 and 1111 equaling 0xF.

The highest address in a 32-bit memory space can also be expressed as 2^{32} - 1, since the address count starts from 0, or as 4,294,967,295 in decimal. Using this, we can calculate the total size of the memory space as follows:

In comparison, the highest memory address of a 64-bit architecture would be:

So what exactly does this memory space mean?

Each memory address corresponds to 1 byte in memory. For example:

A 32-bit CPU can reference up to 2^{32}, which equals exactly 4 GB of memory (4,294,967,296 memory locations). This is called addressable memory and it is the maximum amount of memory that a CPU can reference using its addresses.

Physical and Addressable Memory

Physical memory is the actual RAM installed in the system and it is often less than the maximum addressable memory. Some addresses are reserved for system devices or hardware I/O, so not all addresses map to physical RAM.

In comparison, a 16-bit CPU can address up to 65,536 bytes, which equals 64 KB of addressable memory, while a 64-bit CPU can theoretically address up to 18,446,744,065,119,617,025 KB, or 16,384 PB of memory.

Physical and Virtual Memory

Operating systems use virtual memory to allow processes to work as if they have the full addressable space, even if physical RAM is smaller.

For 32-bit architectures virtual addresses go from 0x00000000 to 0xFFFFFFFF. This does not correspond to physical RAM addresses. Multiple processes can have the same virtual addresses that map to different physical memory locations.

Physical RAM is shared among all processes. Virtual addresses are translated to physical addresses by the CPU using page tables. So, for example, the stack of one program isn’t actually at the same place in RAM as the stack of another program, even if they both see 0xFFFFFFFF in their own virtual space.

Endianess

When a CPU stores values larger than one byte, such as 2-byte, 4-byte, or 8-byte numbers, it must decide the order in which the bytes are stored in memory. This ordering is called endianness:

• Big-endian: the most significant byte (MSB) is stored at the lowest memory address.
• Little-endian: the least significant byte (LSB) is stored at the lowest memory address.

For example, using the table above, the values would be arranged differently in memory depending on the endianness.

While in litte endian, it would be:

As another example, the 16-bit value 0xCAFE would be stored as FECA0000 in little-endian format and as 0000CAFE in big-endian format. Note that the leading zeros are typically displayed when showing memory contents in fixed-width formats.

Word Size and Memory Access

The word size of a CPU refers to the number of bits it processes or moves at a time. For example, a 32-bit CPU works with 32-bit (4-byte) chunks, while a 64-bit CPU works with 64-bit (8-byte) chunks. Larger word sizes allow the CPU to handle bigger numbers and process more data at once, improving performance.

Even though memory is addressed one byte at a time, CPUs typically read and write data in units of their word size. To support this, memory is often organized and accessed in aligned blocks, meaning that multi-byte values are stored at addresses that are multiples of the CPU’s word size. Aligned access is faster and more efficient, while misaligned access can slow down execution or even cause hardware exceptions on some systems.

Word size also determines how the CPU interprets multi-byte values in memory. When reading a word, the CPU must know the system’s endianness, whether the most significant or least significant byte comes first, so it can reconstruct the original value correctly.